The present disclosures relate to RF devices, and more particularly, to an RF power transistor device with metal electromigration design and method thereof.
RF-LDMOS transistor designs have approached electromigration historically as an issue to be solved by lowering current density. Such an approach leads to wider and wider drain metal lines, which has the negative effect of increasing device capacitances.
FIG. 1 is a top down diagram view of a portion 10 of a top metal design known in the art for an RF MOSFET. FIG. 2 is a cross-section view of the top metal design of FIG. 1, taken along line 2-2. As shown in FIGS. 1 and 2, the portion of the top metal design 10 includes two metal layers, Metal-1 and Metal-2, designated by reference numerals 12 and 14, respectively. Metal-1 layer 12 couples to the Metal-2 layer 14 with a metal via 16. In addition, Metal-2 layer 14 is separated from the Metal-1 layer 12 by an interlevel dielectric layer 18. In addition, the Metal-1 layer 12 has a width as indicated by reference numeral 20. Metal-2 layer 14 has a width as indicated by reference numeral 22. In one example, width 20 for Metal-1 layer 12 is on the order of 2.5 μm and width and width 22 for Metal-2 layer 14 is on the order of 11.2 μm. The top metal design 10 of FIG. 1 suffers from poor electromigration characteristics of the Metal-2 layer, and thus resulting in an inadequate electromigration MTTF (Mean Time To Failure). Electromigration is a wear out mechanism with a log normal failure rate (i.e., failures are not uniformly distributed over time).
In some LDMOS designs, gold is used which provides better electromigration lifetimes inherently. However, the use of gold prevents manufacture of the LDMOS product in standard CMOS fabs.
Accordingly, there is a need for an improved method and apparatus for overcoming the problems in the art as discussed above.
The use of the same reference symbols in different drawings indicates similar or identical items. Skilled artisans will also appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of the embodiments of the present invention.